Dec 1, 2023 - Apr 29, 2024
Mar 6, 2021 - Dec 1, 2023
Electrical and Computer Engineering Building, Room 3002
Fall 2023 Industry Workshop & Advisory Board Meeting
December 5-6, 2023
Zoom Link will be sent to registered email address prior to the event.
How can universities, industry and national labs work together to create the next-generation of energy-efficient, high-performance semiconductors? Learn how we can partner to meet the U.S.’s CHIPS Act goals at the University of Illinois Urbana-Champaign.
Join us as we discuss cutting-edge semiconductors and microelectronics research at Illinois and engage with students at the 5 minute poster session. You will also meet top semiconductor industry, national lab, and DoD members. Registration is free.
Accessing the Meeting
After registering here, a Zoom link and meeting invite will be sent to your registered email address. Please reach out to the above contacts if you have not received the invite by Monday, December 4th.
|Day 1||December 5, 2023|
Melanie Loots, Executive Associate Vice Chancellor for Research & Innovation
ASAP Center Updates
Shaloo Rakheja, Director of ASAP Center
John Abelson, Gregory Girolami, Topological Semimetals by Superconformal CVD
Arend van der Zande, Strain-Induced Mobility Enhancement in 2D Material Transistor
|Day 2||December 6, 2023|
Keynote Speaker Presentation
Jiong Zhang, Intel
Education and Workforce Development
Shaloo Rakheja, ASAP Center Director
|11:00-11:30 AM||5 Minute Student Poster Presentations|
Potential New Project Overview
|11:45-12:00 PM||PI Response to Industry Feedback|
Closed IAB Meeting
Discussions of Closed IAB Meeting with ASAP Leadership
Keynote Details -
Critical Nano-Metrology for Emerging Technologies
Dr. Jiong Zhang - Principal Engineer at Intel
Bio: Jiong Zhang received his PhD from the University of Illinois at Urbana Champaign, and his MA and BA both from Tsinghua University, all in Materials Science and Engineering. Jiong joined Intel in 2011, and is currently a Principal Engineer focusing on Silicon technology R&D, advanced analytical technique development and competitive analysis across industry. Jiong has also led multiple research projects with universities and national labs for emerging nanoelectronics metrology innovations. Jiong has more than 40 scientific journals publications and several invited book chapters.
Abstract: Metrology is an essential and integrated part for Si technology development, manufacturing and yield. Transistor scaling with introduction of novel architectures and new materials have raised considerable challenges for metrology at nanoscale. This keynote will focus on advanced and state of art analytical techniques from device to array to wafer level, to address the metrology gaps for continuing Moore’s Law, to build the next stage metrology for structural, compositional and property characterization.